Semiconductor memory device capable of calibrating data...

Details Semiconductor memory device capable of calibrating data... Semiconductor memory device capable of calibrating data...

2005-09-20

2005-09-20

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

C327S106000, C326S087000

Reexamination Certificate

active

06947334

ABSTRACT:
There is provided a synchronous memory device, in which a data input setup timing is calibrated. The synchronous memory device includes: a data input unit for calibrating a timing of data inputted in synchronization with a data strobe signal; and a first setup time control unit for detecting an input timing of an OCD control code data inputted to the data input unit in an OCD calibration mode, and for controlling a data output timing of the data input unit.

REFERENCES:
patent: 2004/0174193 (2004-09-01), Song
patent: 2005/0057281 (2005-03-01), Yoo

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