Semiconductor memory device capable of block writing in large bu

Static information storage and retrieval – Addressing – Plural blocks or banks

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36518901, 36523001, G11C 800

Patent

active

059301945

ABSTRACT:
Columns included in a sub-block are divided into first and second groups. If a defective memory cell column is present in the first group, an address comparison circuit activates a signal to select a redundant memory cell column, then selection prohibiting signal attains an "L" level based on information programmed in a programming circuit, a selection of a column in the first group is prohibited, and a redundant memory cell column selection signal is activated. Meanwhile, a normal selecting operation is performed to the second column group.

REFERENCES:
patent: 5293348 (1994-03-01), Abe
patent: 5416740 (1995-05-01), Fujita et al.
patent: 5422850 (1995-06-01), Sukegawa et al.
patent: 5546350 (1996-08-01), Gillingham
"A Multimedia 32b RISC Microprocessor with 16Mb DRAM", Shimizu et al., 1996 IEEE International Solid-State Circuits Conference, 1996 Digest of Technical Papers, ISSCC96/Session 13/Microprocessors/Paper 13.4, pp. 216-217.

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