Semiconductor memory device capable of applying stress...

Details Semiconductor memory device capable of applying stress... Semiconductor memory device capable of applying stress...

2006-03-07

2006-03-07

Yoha, Connie C. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Testing

C365S200000, C365S230060, C365S230080

Reexamination Certificate

active

07009897

ABSTRACT:
A write buffer drives in a normal operation a level in potential of an I/O line pair in accordance with data externally input to be written, whereas a burn in write buffer is controlled in a test operation by a control circuit to drive the I/O line pair in level. A column address decoder in the test operation is controlled by the control circuit to select simultaneously a plurality of bit line pairs capable of coupling with a single I/O line pair.

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