Semiconductor memory device and various systems mounting them

Static information storage and retrieval – Systems using particular element – Ferroelectric

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365149, 365207, 365210, G11C11/22;11/24;7/02

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active

059034920

ABSTRACT:
A computer system is characterized by comprising a microprocessor for performing various arithmetic processing operations, an input/output device connected to said microprocessor to send/receive data to/from an external device; and a semiconductor memory device connected to said microprocessor to store data, wherein said semiconductor memory device includes a plurality of memory cells each having a transistor having a source terminal and a drain terminal and a ferroelectric capacitor having a first terminal connected to said source terminal and a second terminal connected to said drain terminal, a predetermined number of memory cells are connected in series, and a select transistor is connected to at least one terminal of said series connected portion to constitute a memory cell block, and a plurality of memory cell blocks are arranged to constitute a cell array.

REFERENCES:
patent: 5029128 (1991-07-01), Toda
patent: 5307304 (1994-04-01), Saito et al.
patent: 5373463 (1994-12-01), Jones, Jr.
patent: 5383150 (1995-01-01), Nakamura et al.
patent: 5517445 (1996-05-01), Imai et al.
patent: 5592646 (1997-01-01), Thomas
K. Sunouchi, et al., "A Surrounding Gate Transistor(SGT) Cell for 64/256Mbit DRAMs", IEDM, Dec. 1989, pp. 23-26.
T. Hasegawa, et al., "An Experimental DRAM with a NAND-Structured Cell", IEEE International Solid-State Circuits Conference, Feb. 24, 1993, pp. 46-47.
T. Sumi, et al., "A 256kb Nonvolatile Ferroelectric Memory at 3V and 100ns", IEEE International Solid-State Circuits Conference, Feb. 18, 1994, pp. 268-269.
H. Koike, et al., "A 60ns 1Mb Nonvolatile Ferroelectiric Memory with Non-Driven Cell Plate Line Write/Read Scheme", IEEE International Solid-State Circuits Conference, Feb. 10, 1996, pp. 368-369.
K. Takeuchi, et al., "Half-Vcc Plate Nonvolatile DRAMs with Ferroelectric Capacitors", Jeice Trans. Electron., vol. E79-C, No. 2, Feb. 1996, pp. 234-242.

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