Semiconductor memory device and test method thereof

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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C365S230060, C365S189070

Reexamination Certificate

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06912166

ABSTRACT:
A semiconductor memory device disclosed herein comprises: a memory cell array divided into a plurality of blocks, each of which includes a plurality of memory cells; a plurality of row decoders which correspond to the blocks, each of the row decoders including an access information holder configured to hold access information indicating whether its corresponding row decoder has been accessed; and an access information reader configured to read the access information held in the access information holders.

REFERENCES:
patent: 4090258 (1978-05-01), Cricchi
patent: 5532970 (1996-07-01), Butler et al.
patent: 5657469 (1997-08-01), Shimizu
U.S. Appl. No. 09/968,706, filed Oct. 2, 2001.

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