Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2011-04-26
2011-04-26
Nguyen, Tuan T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S201000
Reexamination Certificate
active
07933159
ABSTRACT:
A semiconductor memory device includes a memory cell array, a redundant element, an address specifying circuit configured to select one of a plurality of addresses as a redundancy address in response to a switchover signal, a decoder circuit configured to select the redundant element in response to an externally applied address that matches the redundancy address selected by the address specifying circuit, and a test mode setting circuit configured to change the switchover signal in response to an externally applied input, thereby to cause the redundancy address assigned to the redundant element to be switched between different ones of the plurality of addresses.
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Kitayama Daisuke
Kobayashi Hiroyuki
Arent & Fox LLP
Fujitsu Semiconductor Limited
Nguyen Tuan T.
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