Semiconductor memory device and sense amplifier

Details Semiconductor memory device and sense amplifier Semiconductor memory device and sense amplifier

1986-12-29

1989-06-20

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Differential sensing

365208, 36518909, 3652256, G11C 700, G11C 1142

Patent

active

048414867

ABSTRACT:
A semiconductor memory device having a memory plane defined by a plurality of memory cells, a decoder line for accessing the memory cells, a common data line on which a signal output from an accessed memory cell is collected, and a sense amplifier for amplifying the signal collected on the common data line. The sense amplifier has an amplifying circuit portion which is composed of a pair of common-collector type bipolar transistors supplied with the signal collected on the common data line as a differential input, and a plurality of MOS transistors for converting a change in current into a change in voltage. Each of the MOS transistors has a lightly-doped drain structure.

REFERENCES:
patent: 4045784 (1977-08-01), Mayumi et al.
patent: 4298960 (1981-11-01), Mitake et al.
patent: 4335449 (1982-06-01), Nokubo
patent: 4399520 (1983-08-01), Arlizumi et al.
patent: 4590438 (1986-05-01), Fukushima et al.
patent: 4604533 (1986-08-01), Miyamoto et al.
patent: 4626794 (1986-12-01), Sugimoto

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