Static information storage and retrieval – Read/write circuit – Common read and write circuit
Reexamination Certificate
2011-01-25
2011-01-25
Auduong, Gene N (Department: 2827)
Static information storage and retrieval
Read/write circuit
Common read and write circuit
C365S189070, C365S233100
Reexamination Certificate
active
07876626
ABSTRACT:
A semiconductor memory device comprises a memory cell array including a plurality of memory cells arranged at intersections of word lines and bit lines; a read/write circuit operative to execute data read/write to the memory cell; and an operational circuit operative to compare certain length data read out by the read/write circuit from plural ones of the memory cells with certain length data to be written in the plural memory cells to make a decision, and create a flag representing the decision result. The read/write circuit inverts each bit in the certain length data to be written in the memory cells in accordance with the flag, and writes only rewrite-intended data of the certain length data and the flag. The read/write circuit reads the certain length data together with the flag corresponding thereto, and inverts each bit in the certain length data in accordance with the flag.
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Isobe Katsuaki
Maejima Hiroshi
Mukai Hideo
Takase Satoru
Tokiwa Naoya
Auduong Gene N
Kabushiki Kaisha Toshiba
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
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