Semiconductor memory device and semiconductor memory device...

Details Semiconductor memory device and semiconductor memory device... Semiconductor memory device and semiconductor memory device...

2009-11-03

2011-11-01

Phung, Andy (Department: 2824)

Static information storage and retrieval

Read/write circuit

Simultaneous operations

C365S207000

Reexamination Certificate

active

08050108

ABSTRACT:
Provided is a destructive readout semiconductor memory device capable of avoiding concentration of a writeback current, in which a switch circuit (24) is provided between each bit line (21) and each sense amplifier (26). In writeback, the switch circuits are turned on at staggered time points. In readout, the switch circuits are turned on to read memory cell data to the sense amplifiers while the sense amplifiers are turned off, and the switch circuits are then turned off once. After that, the sense amplifiers are turned on to amplify the read data. The switch circuits are subsequently divided into groups and turned on again to write back the data amplified by the sense amplifiers to the memory cells. The switch circuits are divided into groups to be turned on at staggered time points during the writeback, to thereby avoid concentration of the writeback current in one time period.

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patent: 2008/0094928 (2008-04-01), Yokoyama
patent: 2003-272390 (2003-09-01), None
patent: 2007-157283 (2007-06-01), None

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