Semiconductor memory device and semiconductor integrated...

Details Semiconductor memory device and semiconductor integrated... Semiconductor memory device and semiconductor integrated...

2006-02-14

2006-02-14

Tran, Michael (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S191000

Reexamination Certificate

active

06999368

ABSTRACT:
A row control circuit of a semiconductor memory device includes an oscillator as a clock oscillator for generating an internal clock, a D flipflop as a refresh request signal RFRQ generation circuit for generating a refresh request signal RFRQ synchronously with the internal clock, and a delay circuit, a NAND gate, an AND gate, a D flipflop, a delay circuit, an AND gate and an OR gate as refresh circuits. By using a refresh request signal RFRQ and an active signal ACT, internal refresh is performed internally in a DRAM separately from an external refresh command.

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