Semiconductor memory device and semiconductor integrated...

Details Semiconductor memory device and semiconductor integrated... Semiconductor memory device and semiconductor integrated...

2001-06-05

2003-02-18

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S189090

Reexamination Certificate

active

06522567

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory device and a semiconductor integrated device using the same. In particular, the present invention relates to a technology that improves the data retention characteristics of a ferroelectric memory by detecting the degradation of the data retention characteristics and enabling sufficient data to be written so as to eliminate a deficiency in writing data into a memory cell because of such degradation.
2. Description of the Related Art
A nonvolatile, low-power, and high-speed ferroelectric memory has been a focus of attention, particularly since the early 1990s. The ferroelectric memory employs hysteresis characteristics, observed in the polarization-electric field characteristics of a ferroelectric material, as a memory cell.
FIG. 2
shows the hysteresis characteristics observed in the polarization-electric field characteristics (Q-V characteristics). In
FIG. 2
, the x-axis indicates electric field intensity (the magnitude of voltage), the y-axis indicates polarization (charge), and EC
1
and EC
2
indicate a coercive field (coercive voltage).
A ferroelectric without polarization (represented by “A” in
FIG. 2
) is polarized (represented by “B”) by applying an electric field in the positive direction. The ferroelectric retains its polarization after the electric field has been removed, which is called residual polarization (represented by “C”). Next, when the electric field is applied in the negative direction, the ferroelectric is polarized in the opposite direction to the polarization caused by the positive electric field (represented by “D”). The ferroelectric retains its polarization after the electric field has been removed (represented by “E”).
As shown in
FIG. 2
, the ferroelectric has the polarization even in the absence of an externally applied electric field (voltage). The ferroelectric can be used as a memory cell by taking two different states resulting from the residual polarization as
1
(“C”) and
0
(“E”), respectively. A ferroelectric memory is a device that employs such a ferroelectric as a memory cell capacitor.
Next, as an example of the ferroelectric memory using a ferroelectric material for its memory cells, the configuration and operation of a ferroelectric memory including 2T/2C cells will be described.
FIG. 3A
is a circuit diagram showing a cell circuit structure of the ferroelectric memory.
FIG. 3B
shows waveforms representing the operation of the ferroelectric memory in a cell plate line driving method.
In
FIG. 3A
, reference numeral
31
is a memory cell,
32
is a sense amplifier, WL is a word line, BL/XBL is a bit line pair for reading/writing data on the memory cell, CP is a cell plate line, and Ns is a ferroelectric memory cell (memory node).
The operation of the ferroelectric memory having the above configuration will be described with reference to FIG.
3
B.
First, the word line WL is raised to a logic “H” level (t
11
). Thereafter, the cell plate line CP goes to “H” so that the memory cells Ns are selected (t
12
). When the CP is driven to the “H” level, the charge from the memory cells appears on the bit line pair BL/XBL. At this time, the charge is divided by a bit line pair capacitance Cb and a memory cell capacitance (also referred to as a ferroelectric capacitor) Cs, producing electric potential on the bit line pair BL/XBL.
Next, a sense amplifier activating signal SAE goes to “H” so that the sense amplifier is activated (t
13
). Thus, the potential difference of the bit line pair BL/XBL is amplified to VCC and VSS levels, thereby reading data and rewriting “L” data.
When the CP is lowered to an “L”(VSS) level, “H” data is rewritten into the memory cell. Finally, the WL is returned to “L”, and thus the operation is completed.
FIG. 4
shows a hysteresis curve of the ferroelectric memory cell during a data read operation.
In
FIG. 4
, a potential level that appears on the bit line pair BL/XBL is determined by the shape of the hysteresis curve of the ferroelectric memory cell and a bit line pair capacitance Cb. The bit line pair capacitance Cb is represented by the slope of thick lines in FIG.
4
. When the cell plate line CP goes to the “H” level, VCC potential is applied to the series capacitance of the ferroelectric capacitor and the bit line pair capacitance. Thus, the charge flows out of the ferroelectric capacitor to charge the bit line pair. The reading of data depends on the difference &Dgr;V between a potential VH in reading “H” data and potential VL in reading “L” data. Therefore, a larger potential difference &Dgr;V stabilizes the read operation.
The repetition of polarization reversal causes a ferroelectric to be fatigued and degraded, involving residual polarization loss or the like. The ferroelectric memory performs a destructive read operation. In addition, the fatigue and degradation of the ferroelectric due to polarization reversal occur in both read and write operations. This results in low reliability, such as a reduction in the data retention period and the inability to read and rewrite data.
In the ferroelectric memory, one of the phenomena of fatigue and degradation of a ferroelectric by repetitive read/write operations is called “imprint”, where a hysteresis curve is shifted.
FIG. 5
shows such an imprint phenomenon.
In
FIG. 5
, “I” is the hysteresis curve of a memory cell before imprint occurs, “H” is the hysteresis curve of the memory cell retaining data “
1
” after imprint, and “L” is the hysteresis curve of the memory cell retaining data “
0
” after imprint. For example, when data are read from the 2T/2C cell in the case of imprint, the read voltage is reduced to &Dgr;V′(<0), compared with &Dgr;V shown in FIG.
4
. Thus, the sensitivity margin of the amplified data is decreased significantly, causing faulty operations. As a result, the data retention characteristics of the ferroelectric memory cell become poor.
Moreover, even in the absence of polarization reversal due to write/read operations, the imprint phenomenon occurs by maintaining the spontaneous polarization of a ferroelectric material in the predetermined direction (i.e., the ferroelectric material retains the predetermined data). This reduces residual polarization particularly because the imprint phenomenon causes a deficiency in writing opposite data. Thus, the sensitivity margin of the amplified data is decreased significantly, which leads to the degradation of data retention characteristics, resulting in low reliability.
FIGS. 6A and 6B
show a phenomenon of deficiency in writing opposite data, including the coercive field movement (to a higher electric field) in the Q-V characteristics of a ferroelectric in the case of imprint.
FIG. 6A
shows the imprint phenomenon, where the ferroelectric retains data in the state of point C in FIG.
2
.
FIG. 6B
shows the imprint phenomenon, where the ferroelectric retains data in the state of point E in FIG.
2
.
When the imprint phenomenon occurs, the hysteresis curves in
FIGS. 6A and 6B
, each represented by a broken line, are shifted as indicated by the thick arrows to become the hysteresis curves represented by dotted and thick lines, respectively. The “shift” of the hysteresis curves increases the coercive field EC
1
to EC
1
′ in FIG.
6
A and the coercive field EC
2
to EC
2
′ in FIG.
6
B. To write sufficient data having the opposite logic to the retained data, it is necessary to apply the electric field (voltage) larger than that before the imprint phenomenon occurs to the ferroelectric capacitors as indicated by the thin arrows in
FIGS. 6A and 6B
. Also, to provide a sufficient read voltage &Dgr;V for reading, the electric field (voltage) larger than that before the imprint phenomenon occurs is necessary, just as for writing.
To prevent low reliability caused by imprint, the “shift” of a hysteresis curve resulting from imprint is suppressed, and the occurrence of imprint is detected to correct such “shift” so that the original characteristics are restored, i.e.,

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