Semiconductor memory device and semiconductor device and...

Details Semiconductor memory device and semiconductor device and... Semiconductor memory device and semiconductor device and...

2007-11-27

2007-11-27

Hur, J. H. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S226000, C365S189110, C365S189090, C365S230060, C365S149000

Reexamination Certificate

active

10507117

ABSTRACT:
A cell core unit and its peripheral circuit are driven by a relatively low voltage power supply. A constant voltage that does not depend on the power supply voltage is provided as a boosted voltage (VBOOST) to be supplied to a control signal for a word line of the cell core unit. A sense amplifier amplifies a higher voltage level of a bit line to the power supply voltage. Then, a circuit for generating a signal for defining the transition timing and/or the pulse width of a control signal from the peripheral circuit to the cell core unit performs signal delay using a delay circuit having a characteristic in which a delay time thereof decreases with reduction of the provided power supply voltage.

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