Semiconductor memory device and semiconductor device

Details Semiconductor memory device and semiconductor device Semiconductor memory device and semiconductor device

2011-08-02

2011-08-02

Dudek, Jr., Edward (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S167000, C711SE12002, C365S189011

Reexamination Certificate

active

07991945

ABSTRACT:
A semiconductor memory device, including: a cell array block including a plurality of memory cells arranged therein; and a controller, wherein the controller controls the semiconductor memory device so that: an operation of reading out data from a second region in the cell array block is initiated before completion of an operation of outputting data read out from a first region in the cell array block; and the data read out from the second region is output successively after the completion of the operation of outputting data read out from the first region.

REFERENCES:
patent: 6977845 (2005-12-01), Kawai et al.
patent: 7164605 (2007-01-01), Kawai et al.
patent: 2005/0018486 (2005-01-01), Kawai et al.
patent: 2006/0092708 (2006-05-01), Kawai et al.
patent: 2010/0226176 (2010-09-01), Li
patent: 2005-025819 (2005-01-01), None
“Toshiba TH58NVG1S3AFT05: Tentative Toshiba MOS Digital Integrated Circuit Silicon Gate CMOS,” p. 1-32, May 19, 2003.

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