Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2007-06-19
2009-08-25
Ho, Hoai V (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S189090, C365S230060
Reexamination Certificate
active
07580308
ABSTRACT:
A refresh method for a semiconductor memory device features high noise resistance, lower power consumption, and lower cost. All word lines of one or more memory cell blocks that have not been selected in a self refresh mode are controlled to have a floating potential substantially at ground level. Even when a word line and a bit line are short-circuited, this control prevents destruction of memory cell information, which may be caused by noise, and also prevents generation of leakage current. A fuse, etc., for preventing generation of leakage current is unnecessary, so that lower cost is realized.
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Kawamoto Satoru
Nakagawa Yuji
Sato Hajime
Arent & Fox LLP
Fujitsu Microelectronics Limited
Graham Kretelia
Ho Hoai V
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