Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2007-08-21
2009-02-03
Auduong, Gene N. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S195000, C365S230060
Reexamination Certificate
active
07486584
ABSTRACT:
A semiconductor memory device has a refresh control circuit for switchingly controlling a first refresh mode in which access to the memory cell array from outside is prohibited while retaining data and a second refresh mode in which access to the memory cell array from outside is permitted while retaining data and for performing the refresh operation of the memory cells corresponding to a selected word line, and a designating circuit for individually designating a portion to be refreshed in the first refresh mode and a portion to be refreshed in the second refresh mode. In the semiconductor memory device, the refresh control circuit performs the refresh operation when the portion to which the selected word line belongs is designated to be refreshed, and does not perform the refresh operation when the portion to which the selected word line belongs is not designated to be refreshed.
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Auduong Gene N.
Elpida Memory Inc.
Sughrue & Mion, PLLC
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