Semiconductor memory device and read and write methods thereof

Details Semiconductor memory device and read and write methods thereof Semiconductor memory device and read and write methods thereof

1996-09-11

1998-12-01

Nguyen, Viet Q.

Static information storage and retrieval

Addressing

Sync/clocking

36523006, 36523001, 36523008, G11C 800

Patent

active

058448586

ABSTRACT:
A semiconductor memory device includes input/output circuitry capable of operating in sync with an externally provided I/O clock signal. A data in buffer and a data out buffer provide for serial to parallel conversion of write data and, conversely, parallel to serial conversion of read data. The data buffers can be synchronized with the external I/O clock signal thereby decoupling their operation from the internal system clock signal. This strategy improves I/O bandwidth and further provides for matching different numbers of bit lines or word sizes as between the I/O data port and the memory array itself. An internal I/O clock generator can be provided for generating I/O clock signals, again without the limitation of synchronizing to the internal system clock signal.

REFERENCES:
patent: 5463577 (1995-10-01), Oowaki et al.
patent: 5590086 (1996-12-01), Park et al.
patent: 5603009 (1997-02-01), Konishi et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device and read and write methods thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device and read and write methods thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device and read and write methods thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2400913