Semiconductor memory device and operating method of the same

Details Semiconductor memory device and operating method of the same Semiconductor memory device and operating method of the same

2005-05-20

2010-02-16

Chace, Christian P (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C710S035000, C365S189050, C365S230080

Reexamination Certificate

active

07664908

ABSTRACT:
A semiconductor memory device adapted to burst transmission is provided for improving flexibility of data write operation. The semiconductor memory device is composed of a memory array, a set of write registers, and an input buffer designed to sequentially receive a series of write data during a burst cycle, and to write the write data into the associated write registers. The device also includes a write release register containing a set of write release flags associated with the write registers, respectively, and a write release register controller asserting the associated write release flags in response to the write data being written into the associated write registers. The device also contains a write amplifier designed to concurrently write the write data contained in the write registers associated with the asserted write release flags, selectively, when the burst cycle is aborted in response to a control signal.

REFERENCES:
patent: 6640267 (2003-10-01), Raza
patent: 2003/0146950 (2003-08-01), Miyo et al.
patent: P2003-7060 (2003-01-01), None

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