Semiconductor memory device and method of reading data therefrom

Details Semiconductor memory device and method of reading data therefrom Semiconductor memory device and method of reading data therefrom

1992-02-19

1993-08-10

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

Multiple port access

36518901, 365195, 36518905, G11C 700

Patent

active

052355527

ABSTRACT:
Based on address data of memory cells inputted in a first operating cycle of a host system, data is read from a selected memory cell and outputted from a sense amplifier. At this time, a switch is turned on to allow the output data of the sense amplifiers to be stored in a read storage device. The host system does not accept the data stored in the read storage device and outputted from an A-port data input/output terminal then. Next, the switch is turned off based on address data of the read storage device inputted from the host system in a second operating cycle thereof. In the second operating cycle, the host system accepts the data stored in the read storage device and outputted from the A-port data input/output terminal. In this way, data reading from a memory cell is executed in two operating cycles, and a delay due to the memory cell array and one due to a wiring capacitance of signal lines between the semiconductor memory device and host system are distributed to the respective operating cycles.

REFERENCES:
patent: 4953132 (1990-08-01), Katsu et al.
patent: 4982366 (1991-01-01), Takemae
patent: 5119333 (1992-06-01), Seo

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