Static information storage and retrieval – Read/write circuit – Serial read/write
Patent
1997-04-17
1998-10-06
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Serial read/write
365220, 365149, 36523005, G11C 700
Patent
active
058187766
ABSTRACT:
When stored data of a plurality of memory cells (MC00 to MC03, MC10 to MC13, MC20 to MC23, MC30 to MC33) arranged in a matrix are sequentially read out, a reading access control circuit (101) outputs a row address and a column address to a row decoder (102) and a reading bit-line selector (103), respectively, for an access to the memory cells. The reading access control circuit (101) outputs the row address and the column address so that an n-type memory cell may be first selected by the reading bit-line selector (103) after activation of the selected reading word line every time one of the reading word lines (RWL0 to RWL3) is selected by the row decoder (102). With this configuration, data can be sequentially read out at higher speed from a plurality of memory cells arranged in a matrix.
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Maeno Hideshi
Shibutani Koji
Ho Hoai
Mitsubishi Denki & Kabushiki Kaisha
Nelms David C.
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