Semiconductor memory device and method of operating the same

Static information storage and retrieval – Powering

Reexamination Certificate

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C365S210100, C365S154000, C365S227000, C365S189090

Reexamination Certificate

active

07978559

ABSTRACT:
A semiconductor memory device includes a plurality of word lines, a plurality of pairs of bit lines and complementary bit lines that cross the word lines, and a plurality of memory cells, each memory cell being disposed at a region where a respective word line and a pair of a bit line and a complementary bit line cross each other. A voltage control unit includes a plurality of elements connected in series between a power voltage source and the memory cells and are switched on/off in response to a control signal that controls an operation of the plurality of memory cells. The voltage control unit controls the voltage of the power voltage source to a predetermined level, thereby obtaining a controlled voltage to be supplied to the memory cells.

REFERENCES:
patent: 6141258 (2000-10-01), Kawasumi
patent: 6535421 (2003-03-01), Ozawa
patent: 6804143 (2004-10-01), Hobson
patent: 7292485 (2007-11-01), Lu et al.
patent: 7324368 (2008-01-01), Wang et al.
patent: 2004/0160805 (2004-08-01), Rinerson et al.
patent: 2006/0044865 (2006-03-01), Hirabayashi
patent: 2007/0263447 (2007-11-01), Koike et al.
patent: 2007/0268738 (2007-11-01), Heinrich-Barna et al.
patent: 2007-066493 (2007-03-01), None
patent: 2007-328900 (2007-12-01), None
patent: 2008-065968 (2008-03-01), None
English Abstract for Publication No. 2007-066493.
English Abstract for Publication No. 2007-328900.
English Abstract for Publication No. 2008-065968.

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