Static information storage and retrieval – Systems using particular element – Flip-flop
Patent
1996-05-15
1998-07-07
Nelms, David C.
Static information storage and retrieval
Systems using particular element
Flip-flop
365156, 365182, 257903, 257244, 257297, G11C 1100
Patent
active
057779201
ABSTRACT:
A groove is formed at a surface of a p.sup.- -well region. One of source/drain regions of each of access transistors has an n.sup.- -impurity region and an n.sup.+ -impurity region forming an LDD structure. Another n.sup.- -impurity region is disposed such that n.sup.+ -impurity region is located between these n.sup.- -impurity regions, and is formed at the whole bottom surface of groove. Thereby, it is possible to provide a semiconductor memory device of a high performance including an SRAM in which resistance against soft error is improved, a junction leak current is reduced and a current consumption during standby can be reduced.
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T. Yamanaka et al., "A 25 .mu.m.sup.2, New Poly-Si PMOS Load (PPL) SRAM Cell Having Excellent Soft Error Immunity", IEDM 88, pp. 48-51.
Ishigaki Yoshiyuki
Tsutsumi Kazuhito
Hoang Huan
Mitsubishi Denki & Kabushiki Kaisha
Nelms David C.
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