Semiconductor memory device and method of forming a layout...

Details Semiconductor memory device and method of forming a layout... Semiconductor memory device and method of forming a layout...

2011-01-25

2011-01-25

Nguyen, Viet Q (Department: 2827)

Static information storage and retrieval

Format or disposition of elements

C365S063000, C365S053000

Reexamination Certificate

active

07876591

ABSTRACT:
A semiconductor memory device having a double-patterned memory cell array that includes a plurality of first bit lines spaced apart from each other and having a first pattern, a plurality of second bit lines spaced apart from each other and having a second pattern, the second bit lines being between the first bit lines to define an alternating array of first and second bit lines, the first and second patterns being different from each other, a first main memory cell array defined by a first portion of the alternating array, a second main memory cell array defined by a second portion of the alternating array, bit lines in the first main memory cell array having a substantially same regularity as bit lines in the second main memory cell array, and a dummy array between the first main memory cell array and the second main memory cell array.

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