Semiconductor memory device and method of fabricating the same

Details Semiconductor memory device and method of fabricating the same Semiconductor memory device and method of fabricating the same

1998-02-18

1999-07-20

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438152, 438238, 438241, H01L 2184

Patent

active

059266988

ABSTRACT:
There is provided a semiconductor memory device including a semiconductor substrate, a pair of transfer transistors formed on the substrate, a pair of driver transistors formed on the substrate, first and second thin film load transistors formed above the transfer transistors and the driver transistors with an interlayer insulative film sandwiched therebetween, a drain region of the first thin film load transistor having at least one portion over which a gate electrode of the second thin film load transistor partially lies. The portion is heavily doped with impurities. The above mentioned semiconductor memory device prevents reduction in ON-state current in thin film transistors, and hence improves stability in operation of SRAM cell having a top gate type thin film transistor.

REFERENCES:
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patent: 5460995 (1995-10-01), Kiyono et al.
patent: 5536674 (1996-07-01), Kosa et al.
patent: 5545584 (1996-08-01), Wuu et al.
patent: 5780909 (1998-07-01), Hayashi
T.F. McNelly et al. High Performance 0.25 micron SRAM Technology with Tungsten Interpoly Plug, IEEE (1995), pp. 927-930, IEDM 1995.
K. Tsutsumi et al.; "A High-Performance SRAM Memory Cell with LDD-TFT Loads"; Symp. on VLSI Tech. Digest of Technical Papers; pp. 23-24, 1991.

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