Semiconductor memory device and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S328000, C257S302000, C257S314000, C257S318000, C257S329000, C438S286000, C438S257000, C438S926000

Reexamination Certificate

active

07948021

ABSTRACT:
A semiconductor memory includes a memory cell array area provided with first and second memory cells and having a first active area and a first element isolation area constituting a line & space structure, and having a floating gate electrode and a control gate electrode in the first active area, a word line contact area adjacent to the memory cell array area and having a second active area, first and second word lines with a metal silicide structure, functioning respectively as the control gate electrodes of the first and second memory cells and arranged to straddle the memory cell array area and the word line contact area. A dummy gate electrode is arranged just below the first and second word lines in the second active area.

REFERENCES:
patent: 7786524 (2010-08-01), Hazama
patent: 2010/0155814 (2010-06-01), Sato et al.
patent: 2010/0184275 (2010-07-01), Takeuchi et al.
patent: 2007-73887 (2007-03-01), None

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