Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2007-02-13
2007-02-13
Zarabian, Amir (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S201000, C365S230030
Reexamination Certificate
active
10879552
ABSTRACT:
Provided is directed to a semiconductor memory device and a method of driving the same capable of improving a repair efficiency with comparison to the conventional method which repairs all the redundancy row even when a defective cell is occurred in only one cell, by including: a memory cell array which is comprised of at least more than one redundancy block and redundancy segment by means of dividing it into a plurality of blocks toward a row direction and then dividing the blocks into a plurality of segments; a control circuit for storing a repair information of a defective cell and for repairing the segment generating the defective cell to the redundancy segment according to the repair information by inputting a row address signal and a column address signal.
REFERENCES:
patent: 4918662 (1990-04-01), Kondo
patent: 5907515 (1999-05-01), Hatakeyama
patent: 6646932 (2003-11-01), Kato et al.
patent: 11-178188 (1999-07-01), None
patent: 1997-51414 (1997-07-01), None
Graham Kretelia
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Zarabian Amir
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