Semiconductor memory device and method of controlling sub...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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C365S230030

Reexamination Certificate

active

07551513

ABSTRACT:
A semiconductor memory device includes a sub word line driver for selectively connecting one of sub word lines with a main word line and applying a boosted voltage having a level higher than a power source voltage to a selected sub word line. The device includes a sub word line driver control signal generator. The sub word line driver control signal generator receives an isolation signal applied to electrically insulate a sense amplifier from a bit line connected to memory cells constituting a memory cell array of the device, and generates a driver control signal for determining whether the sub word line driver operates or not. Thereby, a load of sub word line driver control signal generator can be reduced and so power consumption is reduced.

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patent: 6026047 (2000-02-01), Ryu et al.
patent: 6400639 (2002-06-01), Ji et al.
patent: 6545923 (2003-04-01), Sim et al.
patent: 6614712 (2003-09-01), Uchida et al.

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