Semiconductor memory device and method of controlling power...

Static information storage and retrieval – Read/write circuit – Particular write circuit

Reexamination Certificate

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C365S185050

Reexamination Certificate

active

07872927

ABSTRACT:
A voltage generator that monitors a writing margin as a control amount in order to carry out an optimum power source control when control of a SRAM cell power source is carried out at writing operation, and always keeps the writing margin constant; and a power source selector are included to switch power source voltage at writing. By switching the power source voltage at writing, a semiconductor memory device in which a stable writing operation is achieved without largely deteriorating writing time in the SRAM cell and an ultrahigh speed operation or ultralow power operation can be carried out is obtained.

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patent: 6373753 (2002-04-01), Proebsting
patent: 6462998 (2002-10-01), Proebsting
patent: 11-96768 (1999-04-01), None
patent: 2004-259352 (2004-09-01), None
K. Zhang, et al., “A 3-GHz 70Mb SRAM in 65nm CMOS Technology with Integrated Column-Based Dynamic Power Supply”, ISSCC Dig. Tech. Papers, Feb. 2005, pp. 474-475, IEEE.
M. Yamaoka, et al., “A 300MHz 25μA/Mb Leakage On-Chip SRAM Module Featuring Process-Variation Immunity and Low-Leakage-Active Mode for Mobile-Phone Application Processor”, ISSCC Dig. Tech. Papers, Feb. 2005, pp. 480-481, IEEE.

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