Semiconductor memory device and method of checking same for defe

Details Semiconductor memory device and method of checking same for defe Semiconductor memory device and method of checking same for defe

1996-11-19

1998-06-09

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Bad bit

365201, 36523006, G11C 2900

Patent

active

057645760

ABSTRACT:
A semiconductor memory device includes a first test row decoder (9a) for selecting memory cells in normal rows in a test mode, a second test row decoder (9b) for selecting spare memory cell rows, a first test column decoder (10a) for selecting memory cells in normal columns, and a second test column decoder (10b) for selecting spare memory cell columns. A control circuit (11) may perform switching between four combinations of the row and column decoders by using a control signal (SRT) and a control signal (SCT). All spare memory cells are tested prior to reparation of a defective memory cell for yield enhancement.

REFERENCES:
patent: 5113371 (1992-05-01), Hamada
patent: 5247481 (1993-09-01), Conan
patent: 5327382 (1994-07-01), Send et al.
patent: 5343429 (1994-08-01), Navayama et al.
patent: 5377146 (1994-12-01), Reddy et al.
patent: 5400342 (1995-03-01), Matsumura et al.
patent: 5404331 (1995-04-01), McClure
patent: 5544106 (1996-08-01), Koike
patent: 5617364 (1997-04-01), Hatakeyama
patent: 5631868 (1997-05-01), Termullo, Jr. et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device and method of checking same for defe does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device and method of checking same for defe, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device and method of checking same for defe will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2209418