Static information storage and retrieval – Read/write circuit – Simultaneous operations
Reexamination Certificate
2007-03-27
2007-03-27
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Simultaneous operations
C365S190000, C365S230030, C365S230050
Reexamination Certificate
active
10798469
ABSTRACT:
A semiconductor memory device and a method for writing and reading data to and from the same comprises a memory cell array including a plurality of memory cells connected between a plurality of word lines and a plurality of bit line pairs, a predetermined number of write line pairs, a predetermined number of read line pairs, a plurality of write column selection gates for transmitting data between the plurality of bit line pairs and the predetermined number of write line pair during a write operation, and a plurality of read column selection gates for transmitting data between the plurality of bit line pairs and the predetermined number of read line pairs during a read operation. Accordingly, it is possible to input and output data simultaneously through data input pads and data output pads.
REFERENCES:
patent: 6418067 (2002-07-01), Watanabe et al.
patent: 6519192 (2003-02-01), Ooishi
patent: 6542428 (2003-04-01), Hidaka
patent: 6665209 (2003-12-01), Osada et al.
patent: 6847346 (2005-01-01), Kumagai et al.
Choi Jung-Hwan
Lee Jung-Bae
Lee Yun-Sang
Mills & Onello LLP
Nguyen Van-Thu
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