Semiconductor memory device and method for operating the same

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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C365S189050, C365S230060

Reexamination Certificate

active

07869286

ABSTRACT:
The semiconductor memory device includes a data input/output unit configured to input data synchronously with a data clock and to output the data to a memory cell in response to an output strobe signal; and an output strobe signal generation unit configured to output the output strobe signal, wherein the output strobe signal is synchronized with a system clock in response to a write command regardless of whether the semiconductor memory device is in a write training mode.

REFERENCES:
patent: 6480439 (2002-11-01), Tokutome et al.
patent: 7545189 (2009-06-01), Ku
patent: 7636273 (2009-12-01), Lee et al.
patent: 2002/0039323 (2002-04-01), Tokutome et al.
patent: 2005/0007835 (2005-01-01), Lee et al.
patent: 2006/0161745 (2006-07-01), Lee et al.

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