Semiconductor memory device and method for gating the columns th

Details Semiconductor memory device and method for gating the columns th Semiconductor memory device and method for gating the columns th

1995-06-02

1996-11-26

Nelms, David C.

Static information storage and retrieval

Addressing

Byte or page addressing

36523003, 36523006, G11C 800

Patent

active

055792804

ABSTRACT:
Disclosed is a semiconductor memory device with a block write function for reading and writing data in a unit of two bytes, which comprises a plurality of memory cell blocks for associating bits accessed in response to a column address to designate the upper one of the two bytes and bits accessed in response to a column address to designate the lower one of the two bytes, at least two column select lines enabled in response to same column addresses, and a control circuit for separately controlling the two column select lines, wherein the bits of the upper and lower bytes stored in the memory cell blocks are all outputted in response to the column addresses.

REFERENCES:
patent: 5262990 (1993-11-01), Mills et al.

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