Semiconductor memory device and memory system

Details Semiconductor memory device and memory system Semiconductor memory device and memory system

2006-09-05

2006-09-05

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S189040, C365S189050, C365S149000, C365S230080

Reexamination Certificate

active

07102949

ABSTRACT:
A command register holding a decoded result of information relating to an access request supplied from an outside and an address register are provided, and decode of the information relating to an access request from the outside in a processing circuit, namely, a chip control circuit and an address decoder, and an operation corresponding to the external access request in a memory cell array by an access control circuit are made executable independently in parallel, whereby access requests from the outside can be inputted in multiple, and a pipelined operation can be realized for decode and an operation corresponding to the external access request in the memory cell array, thus making it possible to speed up the access operation to a semiconductor memory device without causing any problem.

REFERENCES:
patent: 6842391 (2005-01-01), Fujioka et al.
patent: 6947345 (2005-09-01), Takahashi et al.
patent: 7002868 (2006-02-01), Takahashi
patent: 11016346 (1999-01-01), None
patent: WO98/56004 (1998-12-01), None

Affiliated with

Also associated with

Rating

Semiconductor memory device and memory system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device and memory system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device and memory system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3615185