Semiconductor memory device and memory system

Details Semiconductor memory device and memory system Semiconductor memory device and memory system

2007-07-03

2007-07-03

Elms, Richard T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S189050, C365S230080

Reexamination Certificate

active

11488785

ABSTRACT:
A command register holding a decoded result of information relating to an access request supplied from an outside and an address register are provided, and decode of the information relating to an access request from the outside in a processing circuit, namely, a chip control circuit and an address decoder, and an operation corresponding to the external access request in a memory cell array by an access control circuit are made executable independently in parallel, whereby access requests from the outside can be inputted in multiple, and a pipelined operation can be realized for decode and an operation corresponding to the external access request in the memory cell array, thus making it possible to speed up the access operation to a semiconductor memory device without causing any problem.

REFERENCES:
patent: 6646944 (2003-11-01), Shimano et al.
patent: 6795363 (2004-09-01), Nakashima et al.
patent: 6801468 (2004-10-01), Lee
patent: 6842391 (2005-01-01), Fujioka et al.
patent: 6947345 (2005-09-01), Takahashi et al.
patent: 7002868 (2006-02-01), Takahashi
patent: 11016346 (1999-01-01), None
patent: 98/56004 (1998-12-01), None

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