Semiconductor memory device and manufacturing method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C438S239000, C438S257000, C438S264000, C438S297000, C257S298000, C257S300000, C257SE27103, C257SE27112, C257SE29300, C257SE21422, C257SE21680, C257SE21694, C365S185100, C365S184000

Reexamination Certificate

active

07807518

ABSTRACT:
The present invention provides a semiconductor memory device having a capacitor electrode of a MOS capacitor formed in polygon and slanting faces enlarged toward an insulating film are provided therearound. A floating gate electrode is provided which extends from over a channel region of a MOSEFT to over corners of ends on the MOSFET side, of the capacitor electrode and which is opposite to the channel region and the capacitor electrode with a gate insulating film interposed therebetween.

REFERENCES:
patent: 6611458 (2003-08-01), Ishibashi et al.
patent: 2007/0187755 (2007-08-01), Moore
patent: 2007/0228467 (2007-10-01), Kurachi
patent: 2009/0065838 (2009-03-01), Nagao
patent: 2001-229690 (2001-08-01), None

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