Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1995-11-22
2000-02-29
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711122, 711144, 711145, 711168, 712 32, G06F 1208, G06F 1300
Patent
active
060322292
ABSTRACT:
An information processor having a high performance as a whole is provided by improving the throughput of the processor and the semiconductor memory device. The information processor comprises a memory having a buffer for temporarily holding data and a processor having a memory interface part for controlling the memory to transfer data to the buffer before determining whether the data is to be written in the memory and to write the data in said memory after determining of writing. Data writing and reading to the semiconductor device is pipelined by justifying data exchange between reading and writing. Since the data transfer timings of reading from a memory and writing in the memory can be executed at the same time, the reading process and the writing process can be performed by pipeline-like process and the throughput can be improved.
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Akioka Takashi
Akiyama Noboru
Hotta Takashi
Sawamoto Hideo
Tanaka Shigeya
Cabeca John W.
Hitachi , Ltd.
Tran Denise
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