Semiconductor memory device and information processing system

Details Semiconductor memory device and information processing system Semiconductor memory device and information processing system

2007-07-10

2007-07-10

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S149000

Reexamination Certificate

active

11236739

ABSTRACT:
A refresh operation at a memory cell array for keeping data stored in memory cells is enabled to be switched whether to be executed based on an external refresh request inputted from external or an internal refresh request generated internally by a refresh control unit, and therefore, when the refresh operation is executed based on the external refresh request, it becomes possible to execute an access operation for the memory cell array in accordance with an access request from external only with a necessary time for executing the operation in accordance with the access request without including a necessary time for executing the refresh operation.

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