Semiconductor memory device and information processing system

Static information storage and retrieval – Systems using particular element – Resistive

Reexamination Certificate

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C365S149000, C365S185080

Reexamination Certificate

active

07995373

ABSTRACT:
A semiconductor memory device comprises a memory cell array and a forming controller. The memory cell array includes a plurality of first memory cells each having a structure in which dielectric material is sandwiched between two electrodes, and the memory cell array is divided into a plurality of areas capable of being designated. The forming controller controls to perform “forming” for the first memory cells in an area selectively designated from the plurality of areas of the memory cell array, and as a result of the forming, the first memory cells are changed to non-volatile second memory cells.

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patent: 6735108 (2004-05-01), Kurth et al.
patent: 7-94681 (1995-04-01), None
patent: 9-82914 (1997-03-01), None

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