Semiconductor memory device and driving method thereof

Details Semiconductor memory device and driving method thereof Semiconductor memory device and driving method thereof

2006-02-03

2010-11-02

Dinh, Son (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S189011, C365S189140

Reexamination Certificate

active

07826253

ABSTRACT:
In a reading operation, an off time and a reading time of a holding control transistor is controlled by a replica circuit, so that a read margin is enlarged. Furthermore, a high power source potential and a low power source potential of an SRAM memory cell are switched in reading and writing operations of the memory cell and in a data holding state by a power source potential switching portion. As a result, a write margin is enlarged, and a leakage current is reduced.

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