Semiconductor memory device and driving method thereof

Details Semiconductor memory device and driving method thereof Semiconductor memory device and driving method thereof

2008-10-01

2010-12-14

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S207000

Reexamination Certificate

active

07852696

ABSTRACT:
This disclosure concerns a memory including a memory cell including a drain, a source and a floating body, wherein when a refresh operation is executed, a first current is carried from the drain or the source to the body and a second current is carried from the body to the second gate electrode by applying a first voltage and a second voltage to the first gate electrode and the second gate electrode, the first voltage and the second voltage being opposite in polarity to each other, and a state of the memory cell is covered to an stationary state in which an amount of the electric charges based on the first current flowing in one cycle of the refresh operation is almost equal to an amount of the electric charges based on the second current flowing in one cycle of the refresh operation.

REFERENCES:
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U.S. Appl. No. 12/352,876, filed Jan. 13, 2009, Higashi, et al.
Pierre Fazan et al, “A New Block Refresh Concept for SOI Floating Body Memories”, IEEE, 2003, pp. 15-16.

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