Semiconductor memory device and driving method thereof

Static information storage and retrieval – Systems using particular element – Semiconductive

Reexamination Certificate

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C365S051000, C365S072000, C257S314000, C257S324000

Reexamination Certificate

active

07136301

ABSTRACT:
First active regions and second active regions intersecting the first active regions at a right angle are defined on the surface of a semiconductor substrate, and diffusion regions are formed in the first and second active regions to interpose an intersecting region therebetween. Then, a gate structure is formed linearly to extend over the intersecting region at a non-zero angle with respect to the first and second active regions. Further, terminals to be connected to metal interconnects are provided on the diffusion regions at a non-zero angle with respect to the first and second active regions, respectively. Consequently provided is a nonvolatile semiconductor memory having a simple gate structure capable of storing 4-bits of information in one memory cell.

REFERENCES:
patent: 6735124 (2004-05-01), Melik-Martirosian et al.
patent: 6809371 (2004-10-01), Sugiyama
patent: 6936891 (2005-08-01), Saito et al.
patent: 7016225 (2006-03-01), Roizin et al.
patent: 2005/0199912 (2005-09-01), Hofmann et al.
patent: 2001-110918 (2001-04-01), None
B. Eitan, et al., “Can NROM, a 2-bit, Trapping Storage NVM Cell, Give a Real Challenge to Floating Gate Cells?” SSDM (1999).

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