Semiconductor memory device and driving method thereof

Details Semiconductor memory device and driving method thereof Semiconductor memory device and driving method thereof

2009-03-11

2010-12-28

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Systems using particular element

Semiconductive

C365S158000

Reexamination Certificate

active

07859897

ABSTRACT:
A memory includes: memory cells including floating bodies, wherein in a data holding state, a potential of the first gate electrode is set to be higher than one of potentials of the source and drain layer and lower than the other of the potentials of the source and drain layer so that electric charges flow in the body region, and a potential of the second gate electrode is set to be higher as an absolute value than those of potentials of the source layer, drain layer, and first gate electrode so that electric charges flow from the body region, and in the data holding state, the memory cell is kept in a stationary state that a first amount of the electric charges flowing in the body region per unit time is substantially the same as a second amount of the electric charges flowing from the body region per unit time.

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Takashi Ohsawa et al., “Design of a 128-Mb SOI DRAM Using the Floating Body Cell (FBC)”, IEEE Journal of Solid-State Circuits, vol. 41, No. 1, Jan. 2006, pp. 135-145.
Takashi Ohsawa et al., “An 18.5ns 128Mb SOI DRAM with a Floating Body Cell”, IEEE International Solid-State Circuits Conference 2005, Session 25, Dynamic Memory 25.1, 3 pages.

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