Static information storage and retrieval – Addressing – Multiplexing
Patent
1998-09-15
2000-04-11
Nelms, David
Static information storage and retrieval
Addressing
Multiplexing
36523003, 36523008, G11C 800
Patent
active
060495006
ABSTRACT:
Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
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Endo Akira
Etoh Jun
Hori Ryoichi
Horiguchi Masashi
Ikenaga Shin'ichi
Hitachi , Ltd.
Nelms David
Nguyen Hien
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