Semiconductor memory device and data write and read method...

Details Semiconductor memory device and data write and read method... Semiconductor memory device and data write and read method...

2006-05-18

2009-06-09

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S719000, C714S744000

Reexamination Certificate

active

07546497

ABSTRACT:
A semiconductor memory device includes a serial to parallel converter configured to generate parallel data at a parallel data rate in response to first serial data at first serial data rate in a first mode and configured to generate the parallel data at the parallel data rate in response to a second serial data at second serial data rate in a second mode, wherein the second serial data rate is less than the first serial data rate, and a data write circuit configured to provide the parallel data to a memory cell array.

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patent: 2003/0070052 (2003-04-01), Lai
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patent: 2006/0031565 (2006-02-01), Iyer et al.
patent: 2002-015567 (2002-01-01), None
patent: 10-2004-0080784 (2004-09-01), None
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English language abstract of Korea Publication No. 2004-0095856.
English language abstract of Japanese Publication No. 2002-015567.

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