Static information storage and retrieval – Read/write circuit – Serial read/write
Reexamination Certificate
2011-07-12
2011-07-12
Dinh, Son T (Department: 2824)
Static information storage and retrieval
Read/write circuit
Serial read/write
C365S230050, C365S233100
Reexamination Certificate
active
07978557
ABSTRACT:
A semiconductor device that includes a plurality of memory cell arrays, a plurality of ports, a plurality of internal address generating circuits, and a controller. The plurality of internal address generating circuits may generate first and second internal addresses of first and second memory cell arrays of the plurality of memory cell arrays. The first internal address may designate a first area of the first memory cell array. The second internal address may designate a second area of the second memory cell array. The controller reads a series of data from the first area sequentially and writes the series of read data into the second area sequentially without transferring the series of read data to the plurality of ports.
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Dinh Son T
Elpida Memory Inc.
McGinn IP Law Group PLLC
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