Semiconductor memory device allowing test regardless of spare ce

Details Semiconductor memory device allowing test regardless of spare ce Semiconductor memory device allowing test regardless of spare ce

1998-07-13

1999-10-19

Phan, Trong

Static information storage and retrieval

Read/write circuit

Bad bit

36518905, 36523008, G11C 700, G11C 1604, G11C 800

Patent

active

059700041

ABSTRACT:
A semiconductor memory device according to the present invention includes a block determining portion determining a difference in arrangement between a normal cell and a spare cell which replaces it, a data scramble controlling circuit generating a scramble ON signal when a normal cell is replaced by a spare cell and the spare cell stores inverted data, a scramble circuit inverting data to be written in response to the scramble ON signal, and a scramble circuit inverting data to be read in response to the scramble ON signal.

REFERENCES:
patent: 5559741 (1996-09-01), Sobue
patent: 5748641 (1998-05-01), Ohsawa

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