Semiconductor memory device allowing repair of a defective memor

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment

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365201, G06F 1100

Patent

active

060031484

ABSTRACT:
In a predetermined multibit test mode, a multibit test circuit 114 issues determination result data pairs RDM0 and /RDM0 to RDM3 and /RDM3, each of which corresponds to match/mismatch of logics of data read from memory cells selected by one column select line in corresponding one of memory cell plane blocks. In each memory cell plane block, memory cell columns selected by one single column select line can be replaced as a unit. The unit of memory cell columns containing a defective memory cell is replaced in accordance with determination result data RDM0 and /RDM0 to RDM3 and /RDM3.

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