Semiconductor memory device, a method for manufacturing thereof

Details Semiconductor memory device, a method for manufacturing thereof Semiconductor memory device, a method for manufacturing thereof

1996-09-10

1998-06-02

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257315, 257317, 257321, 365185, H01L 29788

Patent

active

057604371

ABSTRACT:
An independent active region K42 is composed by consecutively providing the source region S42 and S53 of the memory cell MC42 and MC53 between the word line WL2, WL3. The memory cell MC42 and MC53 are connected to the word line WL2, WL3 respectively. Another independent active region K53 is composed by consecutively providing the drain region D53 and D64 of the memory cell MC53 and MC64 between the word line WL3, WL4. The bit line BL3 is formed by connecting each of the independent active regions K30, K31, K32 and K33 with polysilicon respectively. Each of the independent active regions include each of the drain regions D41, D42, D43 and D44 of the memory cells MC41, MC42, MC43 and MC44. Also, the bit line BL4 is formed by connecting each of the independent active regions K41, K42, K43 and K44 with polysilicon respectively. Each of the independent active regions comprises the source regions S41, S42, S43 and S44 respectively.

REFERENCES:
patent: 4935791 (1990-06-01), Namaki et al.
patent: 4949305 (1990-08-01), Toyama et al.
patent: 5272372 (1993-12-01), Kuzuhara et al.
patent: 5500816 (1996-03-01), Kobayashi
patent: 5589699 (1996-12-01), Araki

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