Semiconductor memory device

Static information storage and retrieval – Powering – Conservation of power

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365156, 365190, 365203, 365207, G11C 700

Patent

active

056216939

ABSTRACT:
A power source potential VDD and a ground potential GND are supplied to a memory cell which belongs to a selected column. The power source potential VDD and an intermediate potential V.sub.p are supplied to a memory cell which belongs to a non-selected column. Even if an access transistor of the memory cell which belongs to a selected word line and the non-selected column conducts, a current which flows in a drive transistor is suppressed.

REFERENCES:
patent: 4768166 (1988-08-01), Anami
patent: 5392249 (1995-02-01), Kan
patent: 5539691 (1996-07-01), Kozaru et al.
Fundamentals of MOS Digital Integrated Circuits, p. 366, 1988, John P. Uyemura, "TG Logic Implementation".
1995 Symposium on VLSI Circuits Digest of Technical Papers, pp. 25-26, 1995, Hiroyuki Mizuno, et al., "Driving Source-Line (DSL) Cell Architecture Sub-1-V High-Speed Low-Power Applications".
1993 IEEE International Solid-State Circuits Conference, pp. 252-253, Feb. 26, 1993, Motomu Ukita, et al., "A Single Bitline Cross-Point Cell Activation (SCPA) Architecture for Ultra Low Power SRAMs".

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