Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2000-02-17
2003-07-15
Beausoliel, Robert (Department: 2785)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C365S200000, C711S102000
Reexamination Certificate
active
06594777
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a device for replacing the information in a read-only semiconductor memory device, and more specifically, the present invention relates to a semiconductor memory device which employs a nonvolatile semiconductor memory device for enabling the repair or update of an unrewritable memory device used in game machines, mobile terminals, and the like.
2. Description of the Related Art
Japanese Laid-open Publication No. 7-129396 proposes the following patch method in a read-only memory device for modifying the read-only memory device, in which modification data is pre-stored in a rewritable memory device, and then defective data which is read from the read-only memory device is artificially modified by using the modification data.
Japanese Laid-open Publication No. 6-103056 describes a memory device including a selector for replacing defective data, when the defective data is read, with alternative data.
The conventional patch methods described above, however, have the following problems: a high-speed operation is not possible because the defective data is modified after it is read from the read-only memory device (Japanese Laid-open Publication No. 7-129396) or a selector is used for replacing defective data with modification data after the defective data is read (Japanese Laid-open Publication No. 6-103056); updating of modification data is impossible; and power consumption is significant because the read-only memory device is activated not only when correct data is read but when defective data is read.
SUMMARY OF THE INVENTION
A semiconductor device according to the present invention includes: a read-only semiconductor memory device; and a nonvolatile semiconductor memory device for replacing defective data in at least one defective region which occurred in the read-only semiconductor memory device with modification data for modifying the defective data, the nonvolatile semiconductor memory device including: a memory section capable of electrically writing address data indicating an address of the defective region, and the modification data; and an address determination circuit for outputting a determination result signal which inactivates the read-only semiconductor memory device when the address data matches an address provided from outside the semiconductor memory device, wherein the nonvolatile semiconductor memory device reads and outputs the modification data from the memory section when the address data matches the address.
In one embodiment of the invention, the memory section includes: an address data storage region for storing the address data; and a modification data storage region for storing the modification data.
In another embodiment of the invention, the semiconductor memory device further includes a data processing device-connected to an output of the read-only semiconductor memory device and an output of the nonvolatile semiconductor memory device.
In still another embodiment of the invention, the determination result signal is output outside the device.
In still another embodiment of the invention, the semiconductor memory device further includes at least one modification data storing region and at least one address data storing region.
In still another embodiment of the invention, the semiconductor memory device further includes a circuit for protecting the modification data storing region.
In still another embodiment of the invention, the circuit for protecting the modification data storing region releases the protection of the modification data storing region when a voltage higher than a supply voltage is applied as an external input signal.
In still another embodiment of the invention, the nonvolatile semiconductor memory device further includes a circuit for protecting the address data storing region.
In still another embodiment of the invention, the circuit for protecting the address data storing region releases the protection of the address data storing region when a voltage higher than a supply voltage is applied as an input signal from outside.
In still another embodiment of the invention, the nonvolatile semiconductor memory device further includes a resister for storing the address data read from the memory section in response to an input of a read command.
In still another embodiment of the invention, the read-only semiconductor memory device and the nonvolatile semiconductor memory device are each formed of a single-chip LSI.
In still another embodiment of the invention, the read-only semiconductor memory device and the non volatile semiconductor memory device are each formed of a single-chip LSI and are enclosed in a same package.
According to the semiconductor memory device of the present invention, a nonvolatile semiconductor memory device is employed when defective data occurs or modifying data is updated. The nonvolatile semiconductor device includes a modification data storing region and an address data storing region in its memory section, which enable one to store modification data and address data. Defective data can be automatically replaced with modifying data based on the stored address data when the address of the defective region to be replaced is input, and the read-only semiconductor memory device can be inactivated for outputting modified data only.
Thus, the invention described herein makes possible the advantages of providing (1) a semiconductor device which is capable of replacing defective data with modified data at a high speed: (2) a semiconductor device which is capable of inactivating the read-only semiconductor device when defective data is being replaced with modification data; (3) a semiconductor device which is capable of updating the modifying data when the read-only semiconductor device is modified.
These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.
REFERENCES:
patent: 5109505 (1992-04-01), Kihara
patent: 5179536 (1993-01-01), Kasa et al.
patent: 5454100 (1995-09-01), Sagane
patent: 5457791 (1995-10-01), Matsumoto et al.
patent: 5758056 (1998-05-01), Barr
patent: 5841961 (1998-11-01), Kozaru et al.
patent: 5859960 (1999-01-01), Kurihara et al.
patent: 6158018 (2000-12-01), Bernasconi et al.
patent: 6240486 (2001-05-01), Ofek et al.
patent: 0092646 (1983-11-01), None
patent: 0686980 (1995-12-01), None
patent: 06103056 (1994-04-01), None
patent: 07129397 (1995-05-01), None
Beausoliel Robert
McCarthy Christopher S.
Morrison & Foerster / LLP
Sharp Kabushiki Kaisha
LandOfFree
Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3001462