Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Noise suppression

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365208, G11C 702

Patent

active

055089658

ABSTRACT:
A semiconductor memory device is disclosed, which is supplied with power from a power supply and which includes memory cells and a sense amplifier connected to the cells via bit lines. The memory device further includes a circuit for enabling the sense amplifier in response to a supplied enable signal, and for allowing the sense amplifier to rewrite cell data, read on the bit lines, into the memory cell again in self-refresh mode. The enabling circuit incorporates a noise suppression circuit which suppresses rapid changes in an operation current flowing between the power supply and the sense amplifier in order to minimize power supply related noise.

REFERENCES:
patent: 4661928 (1987-04-01), Yasuoka
patent: 4943949 (1990-07-01), Yamaguchi et al.
patent: 5280453 (1994-01-01), Miyawaki et al.

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